This invention relates to a thermal processing method for conducting a thermal process to a semiconductor wafer or the like, n particular to a thermal processing method suitable for used n forming electrodes of a capacitor.
In general, in order to form a semiconductor integrated circuit such as an IC, desired transistors, resistors, capacitors and so on are formed integratedly in a high density by repeating a film-forming process, an etching process, a thermal diffusion process, an oxidation process or the like to a surface of a semiconductor wafer or a glass substrate many times.
Recently, especially, because of a higher integration of a semiconductor unit, each element itself tends to become more minute. For example, in a storing unit such as a DRAM, an area that each cell occupies tends to become smaller and smaller. In order to ensure enough capacitance even if the area becomes smaller, it is enough to make thin a thickness of an insulation layer between capacitor electrodes or to increase a dielectric constant of the insulation layer. However, if the thickness of the insulation layer is made thinner, insulation performance thereof may be deteriorated. In addition, there are various technical problems in making the material higher dielectric.
Thus, a poly-silicon film whose surface has a minutely irregular profile is formed on a surface of an electrode of a capacitor, in order to double or triple a substantial area of the surface that contributes to capacitance. Methods for forming the poly-silicon film whose surface has the irregular profile are for example shown in JP-A-5-304273 and JP-A-7-221034. That is, they are a method of selectively forming an HSG (Hemispherical Grained) poly-silicon film having an irregular surface profile by causing silicon-nucleic crystal to grow up on a surface of a non-doped amorphous silicon film, and a method of directly depositing a Rugged poly-silicon film having an irregular surface profile on an entire surface of a wafer by setting a certain film-forming condition and then selectively etching it in order to form the poly-silicon film only at predetermined portions.
Herein, there is briefly explained a method of forming a poly-silicon film whose surface has an irregular profile such as an HSG poly-silicon film or a rugged poly-silicon film to a desired portion such as an electrode of a capacitor.
FIG. 9 is a process chart for forming an HSG poly-silicon film as a poly-silicon film whose surface has an irregular profile.
In FIG. 9A, a channel stopper 2, a source 4 and a drain 6 are formed on a surface of a semiconductor wafer W consisting of for example a silicon wafer. On surfaces thereof, a layer insulation film 8 consisting of SiO2 is formed, which may be deposited by using TEOS or the like. A gate electrode 10 is buried in the layer insulation film 8 at a portion between the source 4 and the drain 6. In addition, a bit line 12 is connected to the drain 6. The source 4 is connected to a lower electrode 14 that is formed so as to fulfill a contact hole extending through the layer insulation film 8. An upper end of the lower electrode 14 is formed into a cylindrical circular shape, which enables to make a stack capacitor. For example, the lower electrode 14 is made of a phosphorus-doped amorphous silicon film in which phosphorus atoms have been doped.
Then, in the semiconductor wafer W formed as shown in FIG. 9A, as shown in FIG. 9B, a non-doped amorphous silicon film 16 is selectively formed on the surface of the lower electrode 14. In addition, by causing migration by a thermal process under a higher vacuum, silicon-core crystal is selectively formed only on the non-doped amorphous silicon film 16. Furthermore, as shown in FIG. 9C, the core crystal is caused to grow up by atoms in the non-doped amorphous silicon film 16 moving. Thus, the HSG silicon film 18 whose surface has the irregular profile is formed. Herein, sillan or disilane is used as a process gas. A process temperature is for example about 500 to 600xc2x0 C. Regarding a process pressure, for example when the sillan is used, a partial pressure is 2xc3x9710xe2x88x923 Torr (2.66xc3x9710xe2x88x921 Pa) or less.
FIG. 10 is a process chart for forming a rugged poly-silicon film as a poly-silicon film whose surface has an irregular profile. A state shown in FIG. 10A is the same as that shown in FIG. 9A. From the state, as shown in FIG. 10B, a rugged poly-silicon film 20 whose surface has an irregular profile is directly caused to deposit on an entire surface of the semiconductor wafer W by a predetermined film-forming process. In the case, the rugged poly-silicon film 20 is deposited on the entire surface of the wafer. After that, by a pattern etching process, as shown in FIG. 10C, the rugged poly-silicon film 20 at unnecessary portions is removed so that the rugged poly-silicon film 20 only on the surface of the lower electrode 14 is left.
As shown in FIGS. 9 and 10, after the HSG poly-silicon film 18 whose surface has the irregular profile or the rugged poly-silicon film 20 whose surface has the irregular profile is formed on the surface of the lower electrode 14, an annealing process is conducted at a predetermined temperature. Thus, phosphorus atoms diffuse from the lower electrode 14 being a lower phosphorus-doped amorphous silicon film to the core poly-silicon film 18 or 20. Thus, the core poly-silicon film 18 or 20 becomes a part of the lower electrode. Therefore, the surface area of the lower electrode 14 can be substantially enlarged because of irregularity of the surface of poly-silicon film 18 or 20 in which phosphorus has been doped as described above.
After that, as shown in FIG. 11, a capacitance insulating film 22 consisting of SiO2 or the like is formed on a surface side of the lower electrode 14. Then, a capacitor is formed by making a patterning-processed upper electrode 24.
Herein, in order to cause the HSG poly-silicon film 18 or the rugged poly-silicon film 20 to sufficiently serve as the part of the lower electrode, an enough amount of phosphorus atoms has to be diffused and doped from the lower electrode 14 being the lower phosphorus-doped amorphous silicon film. If the diffusions of the phosphorus atoms are not enough, a depletion layer may be generated, which may cause reduction of the capacitance. A state of the case is shown in FIG. 12. FIG. 12 is a graph showing a capacitance change when positive and negative voltages are applied to the capacitor produced as described above. As clearly seen from the graph, the capacitance remarkably reduces when the voltage is negative, which is undesired in performance as the capacitor.
As a measure thereto, in the case of the HSG poly-silicon film, it may be thought to make the thickness of the film thinner. However, if the thickness is too thin, the irregularity of the surface of the HSG film can not appear. In addition, it may be also thought to increase phosphorus density in the lower electrode 14. However, if the phosphorus density is too high, it becomes difficult to form the HSG film by migration.
As another measure, ionizing phosphorus atoms and directly implanting the ionized phosphorus atoms to the silicon film 18 or 20 with an implantation unit are carried out. However, in the case, the silicon film 18 or 20 may be heavily damaged by the ion implantation. In addition, in the case of the lower electrode 14 having the complicated configuration as shown in FIGS. 9 and 10, it is difficult for the ions to reach side wall portions thereof. That is, it is difficult to implant the phosphorus atoms at even ion density.
In addition, doping phosphorus atoms in the poly-silicon film 18 or 20 is also carried out by an anneal process in a POCl3 atmosphere. However, in the case, if an annealing temperature is not set at 800xc2x0 C. or more, the phosphorus atoms are not doped sufficiently. However, if the semiconductor wafer itself is exposed to such a high temperature atmosphere, phosphorus density may change in a depth direction by thermal budgets, to be out from a designed value for a device.
This invention is intended to solve the above problems effectively. An object of this invention is to provide a thermal processing method that can efficiently dope phosphorus atoms into a poly-silicon film whose surface has an irregular profile so that a depletion layer is prevented from being generated.
This invention is a thermal processing method comprising: a loading step of loading an object to be processed into a processing container, the object having a surface provided with a silicon film having a minutely irregular profile; and a doping step of introducing phosphorus atoms in the silicon film as impurities, by using PH3 gas as a doping gas while maintaining a temperature of 550 to 750xc2x0 C.
By using PH3 gas as a doping gas and by setting a temperature of the thermal process at the range of 550 to 750xc2x0 C., impurity density (phosphorus density) may not change from a designed value so much because the temperature is lower than 750xc2x0 C. In addition, since the temperature is not lower than 550xc2x0 C., efficiency of impurity doping may be maintained high to a certain extent.
Preferably, the loading step includes a step of setting a temperature in the processing container at a temperature lower than 400xc2x0 C. when loading the object to be processed into the processing container. Thus, generation of natural oxide films, which may be deposited on the silicon film of the object to be processed, can be inhibited.
Preferably, a thermal processing method further comprises a temperature raising step of raising a temperature in the processing container to a range of 550 to 750xc2x0 C., between the loading step and the doping step. In the case, preferably, a thermal processing method further comprises a step of subjecting the object to be processed to a cycle-purge process, between the loading step and the temperature raising step. Thus, for example, moisture and/or gases included in a dielectric layer of the object to be processed or the like can be discharged prior to the thermal process. Then, during the thermal process, attachment of natural oxide films can be prevented.
In addition, preferably, a thermal processing method further comprises a step of supplying the doping gas into the processing container to a predetermined pressure, between the loading step and the temperature raising step. Thus, it can be prevented that re-migration of the poly-silicon film is generated and that a surface area thereof is reduced.
Preferably, the doping step includes a step of maintaining a pressure in the processing container at a range of 100 to 400 Torr. Thus, doping efficiency of phosphorus atoms can be improved.
In addition, preferably, a thermal processing method further comprises a temperature lowering step of lowering the temperature of the processing container to a predetermined temperature while continuing to supply the doping gas and maintaining a pressure in the processing container at a predetermined pressure. Thus, it can be prevented that re-migration of the poly-silicon film is generated and that a surface area thereof is reduced.
The silicon film having the minutely irregular profile may be an HSG poly-silicon film. Alternatively, the silicon film having the minutely irregular profile may be a rugged poly-silicon film.
The silicon film into which the phosphorus atoms have been introduced by the doping step may be used as for example a portion of an electrode of a capacitor.